Ini potonya supervisor FYP saya. Lumayan ganteng hhehehe tapi uda menikah. Dia lulusan NUS 1st class (artinya yg bener-bener terbaik alias top student) jurusan elektro pas tahun 1999. Trus dia lanjutin PhD dari program SMA MIT (program yang saya juga pengen ikutin tahun depan, moga-moga bisa diterima). Dia dapet PhD thn 2003 trus jadi Professor di NTU (baru banget). Orangnya baik, friendly banget, dan sepertinya Kristen. Semoga setahun ke depan bisa bekerja sama dengan baik sama dia.
Ini di bawah penjelasan projek saya, males translate ke Indo hehhehe.
Final Year Project proposal 4
Project Title:
V-Ramp and TDDB Reliability Analysis of Cu/Low-k Interconnects
Supervisor:
Asst. Prof. Gan Chee Lip
Co-Supervisor:
-
Description:
This research is mainly focused on reliability issues related to backend dielectrics. V-ramp is a voltage-ramping stress test method to determine the breakdown voltages of dielectrics. Time-dependent-dielectric-breakdown (TDDB) is a stressing method that is mainly applied to measure the useful lifetime of the inter-metallic dielectric (IMD) materials. Copper diffusion is believed to form a leakage current path from anode metal to cathode metal through the IMD materials. In order characterize the failure mechanisms associated with different dielectrics in Cu metal interconnects, much effort is necessary to understand its electrical characteristics and failure mode.
In this project, the student will characterize the electrical performance of different test structures and correlate to its failure mechanisms.
Methodology:
V-ramp and TDDB tests will be conducted on different specifically designed test structures to obtain the breakdown voltage and failure time, respectively, at different temperature and electric field. Failure analysis will be done through using the Scanning Electron Microscope (SEM) to correlate the failure mode and the electrical characteristics.
Equipment:
Wafer Level Test System (NTU)
SEM (NTU)
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